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clash-lang

clash-compiler

clash-lang

A functional hardware description language compiler that transforms Haskell descriptions into synthesizable VHDL, Verilog, or SystemVerilog.

v1.2.5
Published at
Nov 9, 2020
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The author no longer ships through GitHub Releases, but the repository is still active (last push 1d ago). Get the latest version from: Project homepage

Latest release

v1.2.5Nov 9, 2020, 04:56 PM
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README

Project Overview

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Key Features

  • Strongly typed with high type inference for safe and fast prototyping
  • Interactive REPL: load designs and test components without test benches
  • Higher-order functions with type inference for fully parametric designs
  • Synchronous sequential circuit design based on streams of values (Signals)
  • Support for multiple clock domains with type-safe clock domain crossing

Target Audience

  • Hardware designers and FPGA developers
  • Haskell programmers interested in hardware design

Quick Start

  1. Visit clash-lang.org/install to install Clash
  2. Clone the source: git clone git@github.com:clash-lang/clash-compiler.git
  3. Enter the directory and start using it

Core Advantages

  • Functional hardware description language
  • Multi-clock domain support with type safety
  • Interactive REPL for rapid development
  • Active open-source community

System Requirements

  • OS: Cross-platform (Linux, Windows, macOS)
  • Architectures: x86_64, arm64
  • Additional Dependencies: GHC (Haskell compiler)

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